The present invention generally relates to the configuration of programmable logic devices (PLDs), and more particularly to tools used in the configuration of PLDs.
In the past, configuring a programmable logic device (PLD) such as a field programmable gate array (FPGA) was relatively simple. The configuration data in the form of a configuration bitstream was stored in some form of serial, non-volatile memory. The bitstream was then loaded into the FPGA with minimal hardware and software support. This approach continues to the present. However, the vast increase in the number of gates and the increased functionality of programmable logic devices (PLDs) have greatly increased the size of configuration bitstreams, making the simple configuration method very time consuming.
Recently developed configuration interfaces, for example, the SelectMAP interface for some Xilinx(copyright) FPGAs, are made to exploit new configuration capabilities of FPGAs and to reduce the time required to configure a device with a configuration bitstream. For example, the SelectMAP interface supports partial reconfiguration, readback, partial readback and control functions such as reset. The SelectMAP interface includes an eight-bit parallel port that significantly increases the configuration bandwidth over prior PLDs. Further details on the configuration of Xilinx FPGAs can be found, for example, on pages 3-through 3-23 of the Programmable Logic Data Book 1999, available from Xilinx, Inc. of San Jose, Calif.
A number of programming interfaces for configuring PLDS have been developed in order to assist the designer in the configuration process. For example, various configuration arrangements from Xilinx include an application programming interface (API) in a software library for PLD configuration. The routines in the library are callable from an application program for exerting various configuration control functions. In another configuration arrangement, the configuration circuitry of the PLDs is made for interaction with certain microcontrollers. For example, the Virtex(trademark) FGPA from Xilinx has configuration circuitry that is suited for interfacing with 8051 style microcontrollers, originally developed by Intel Corporation, and now available from a variety of sources. Thus, configuration can be performed by programming the microcontroller. Yet another configuration arrangement includes a GUI for invoking control commands. Even though the GUI has less flexibility than does the API, the GUI is easier to learn and use.
With the above-described configuration arrangements, the user must have a working understanding of both the configuration protocol of the PLD and the configuration directives (API, assembly language, command language). However, if the user is not familiar with the protocol and the directives, then additional effort may be required to learn how to configure the PLD. Thus, designers may be reluctant to use a new interface in view of tight development schedules.
A system and method that address the aforementioned problems, as well as other related problems, are therefore desirable.
In various embodiments, the invention provides a system and method for configuring a programmable logic device (PLD) using an automatically generated configuration control file. A control file contains directives for configuring a PLD with a configuration bitstream, wherein the directives are in a selected language. A configuration control file generator is programmed to automatically create the control file with the directives in the selected language, thereby relieving a user from having to learn the configuration protocol and language of the directives. In another embodiment, the particular directives and sequence of the directives that are generated are dependent on a selected configuration mode for the PLD. In performing the directives, configuration control signals are applied to the PLD, and the configuration bitstream is provided to the PLD.
It will be appreciated that various other embodiments are set forth in the Detailed Description and Claims that follow.